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Jobs
14 open roles read nightly from companies’ own hiring pages. Each one links to the original ad.
1–14 of 14 jobs
Counts are paused for a minute after many searches; results are still current.
Special Projects
4 days agoArchitect Labs · Palo Alto, California, United States
On-siteFull-timeAs a member of Special Projects at Architect, you'll work closely with the founders and leadership team to tackle the company's highest-priority business challenges. You'll be the person who can take an important, ambiguous problem—whether in finance, legal, HR, recruiting, or…
Vice President of ASIC Engineering
8 days agoArchitect Labs · Palo Alto, California, United States
On-siteFull-timeExecutiveEngineeringOwn the ASIC methodology and end-to-end delivery of ambitious AI compute silicons, from microarchitecture and RTL through verification, physical design, signoff, and tapeout. Build a fundamentally faster, AI-native chip-development flow, using automation, intelligent agents,…
Chief Architect
9 days agoArchitect Labs · Palo Alto, California, United States
On-siteFull-timeExecutiveDefine the architectural vision for new generation of AI compute silicons, and reinvent how architectures are discovered, explored and co-optimized with AI. Own the critical decisions across compute, memory, interconnect, and hardware–software co-design. Build an autoresearch…
Member of Technical Staff - Physical Design
7 weeks agoArchitect Labs · Palo Alto, California, United States
On-siteFull-timeLead / staffDesignAs our first Physical Design engineer, you'll build the PD function from scratch and extend our AI system from spec-to-netlist to tapeout-ready GDS. You'll own the methodology and hands-on execution for physical implementation at 3nm, 2nm, and future leading-edge nodes.
Member of Technical Staff - Formal Verification
2 months agoArchitect Labs · Palo Alto, California, United States
On-siteFull-timeLead / staffAs a Member of Technical Staff - Formal Verification Engineer at Architect Labs, you'll own formal verification of the AI-generated chip design artifacts, from early specifications through tape-out. You'll turn design intent into assertions, build formal environments, and work…
Microarchitect / RTL Design - Memory Subsystem
2 months agoArchitect Labs · Palo Alto, California, United States
On-siteFull-timeSeniorDesignOwn the memory subsystem RTL end-to-end: from DDR/HBM controller design through code generation, lint, CDC, synthesis, and timing closure using our AI-driven design flow.; Design and implement memory controllers: including DDR5/LPDDR5X PHY-side controller logic, HBM3/HBM3E…
Architect Labs · Palo Alto, California, United States
On-siteFull-timeSeniorDesignOwn the on-chip fabric RTL end-to-end: from NoC topology and router microarchitecture through code generation, lint, CDC, synthesis, and timing closure using our AI-driven design flow.; Design and implement AMBA-based interconnect fabrics: including AXI/ACE/CHI-compliant…
Architect Labs · Bengaluru, India
On-siteFull-timeLead / staffAs a Member of the Technical Staff on the Design Verification & Validation team at Architect, you'll own the verification strategy behind AI-generated designs taping out on leading foundries. You'll work at the intersection of rigorous hardware verification and AI-driven design…
Member of Technical Staff - Software
5 months agoArchitect Labs · Palo Alto, California, United States
On-siteFull-timeLead / staffEngineeringArchitect is a frontier AI lab for custom silicon. We partner with frontier labs, clouds / neoclouds, physical AI companies, and advanced fabs to tape-out custom chips co-designed for next-generation AI workloads. Our goal is to compress end-to-end software to silicon…
Member of Technical Staff - Formal Methods
5 months agoArchitect Labs · Palo Alto, California, United States
On-siteFull-timeLead / staffData & AIAs a Member of the Technical Staff - Formal Methods at Architect Labs, you'll work on the formal foundations of our chip design flow. You will own a critical layer of the stack that gives our system the rigor required to take AI-generated hardware artifacts into verified…
Member of Technical Staff - AI for Chip Design
6 months agoArchitect Labs · Palo Alto, California, United States
On-siteFull-timeLead / staffDesignAs a Member of the Technical Staff (Applied AI) at Architect, you'll sit at the intersection of chip design and frontier AI — translating deep hardware engineering expertise into agentic systems that can reason about, generate, and verify real silicon.
General Application
6 months agoArchitect Labs · Palo Alto, California, United States
On-siteFull-timeArchitect is a frontier AI lab for custom silicon. We partner with frontier labs, clouds / neoclouds, physical AI companies, and advanced fabs to tape-out custom chips co-designed for next-generation AI workloads. Our goal is to compress end-to-end software to silicon…
Architect Labs · Palo Alto, California, United States +1
On-siteFull-timeLead / staffDesignAs a Member of the Technical Staff on the RTL Design team at Architect, you'll own the AI-driven microarchitecture and RTL design of mission-critical SoC blocks and sub-systems (SS) going into production silicon. You will be expected to define, drive, and revise the block-level…
Member of Technical Staff - ML Research
8 months agoArchitect Labs · Palo Alto, California, United States
On-siteFull-timeLead / staffData & AIAs a Member of the Technical Staff at Architect, you'll be at the forefront of training AI models for chip design, verification and exploration tasks. You will be doing fundamental research and applying that to industry-grade chips going into production at leading foundry…
Updated 07 Nov 2026 10:21 UTC from the OptiTalent job library.