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Engineering jobs
118 open roles read nightly from companies’ own hiring pages. Each one links to the original ad.
21–40 of 118 jobs
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Astera Labs · San Jose, California, United States
Lead / staff$185K – $240K a yearEngineeringAstera Labs is seeking a Principal SerDes Bring-up Validation Engineer to join a cutting-edge mixed-signal design team and lead end-to-end post-silicon bring-up, validation, and characterization. You will own bring-up and characterization strategies from the ground up,…
PCIe Firmware Expert
4 weeks agoAstera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel
Lead / staffEngineeringOur firmware team develops the embedded firmware that brings Astera Labs' compute connectivity silicon to life, from boot and initialization through link management, telemetry, error handling, and diagnostics. This firmware runs on the embedded processors inside our chips and…
Senior Firmware SW Engineer
4 weeks agoAstera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel
SeniorEngineeringOur firmware team develops the embedded firmware that brings Astera Labs' compute connectivity silicon to life, from boot and initialization through link management, telemetry, error handling, and diagnostics. This firmware runs on the embedded processors inside our chips and…
Astera Labs · San Jose, California, United States
Director$238.5K – $265K a yearEngineeringAstera Labs is seeking a Director of Hardware Board Validation Engineering to lead the development, bring-up, and validation of board products that enable rack-scale AI infrastructure. Working closely with ASIC, systems, firmware, signal integrity, power integrity, mechanical,…
Principal Engineer - Validation Engineering
5 weeks agoAstera Labs · San Jose, California, United States
Lead / staff$185K – $240K a yearEngineeringAs a Principal Engineer in Hardware Engineering's Validation Engineering organization, you will define and lead validation strategies for Astera Labs' next-generation connectivity products. You will turn complex silicon, board, and system requirements into rigorous plans,…
Tech Lead, Digital Design Engineer
5 weeks agoAstera Labs · San Jose, California, United States
Lead / staff$175.5K – $195K a yearEngineeringAstera Labs is seeking a Tech Lead Engineer to drive front-end digital design for high-performance switch ASICs that enable rack-scale AI infrastructure. In CCE2, you will translate microarchitecture into robust RTL and lead block-level execution across synthesis, timing,…
Principal Logic Design Engineer
5 weeks agoAstera Labs · Bengaluru, Karnataka, India
Lead / staffEngineeringWe are seeking a Principal Logic Design Engineer with deep expertise in micro-architecture and RTL design to lead the development of complex IPs/subsystems. The candidate will provide technical ownership across architecture, microarchitecture, RTL implementation, integration,…
Principal Verification Engineer
5 weeks agoAstera Labs · San Jose, California, United States
Lead / staff$185K – $230K a yearEngineeringLead the functional verification of advanced ASICs, including test planning, development, execution, and coverage analysis.; Collaborate closely with software and system validation teams to create and execute test plans on emulation platforms.; Apply both directed and…
Astera Labs · San Jose, California, United States
Lead / staffEngineeringAs an Astera Labs Principal Product Application Engineer, you will need to provide technical guidance to ODMs to overcome design challenges, generate collateral for existing and new products, and drive innovation by providing insightful feedback to other internal teams to…
Senior Design Verification Engineer
5 weeks agoAstera Labs · San Jose, California, United States
Senior$148.5K – $165K a yearEngineeringAs a Senior Design Verification Engineer, you will help define and deliver robust verification for next-generation connectivity silicon that enables rack-scale AI infrastructure. You will partner closely with RTL, architecture, firmware, and post-silicon teams to build…
Tech Lead Engineer, Design Verification
5 weeks agoAstera Labs · San Jose, California, United States
Lead / staff$175.5K – $195K a yearEngineeringAstera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent…
Astera Labs · Toronto, Ontario, Canada
Lead / staffCA$165K – CA$210K a yearEngineeringAstera Labs is redefining the connectivity that powers rack-scale AI infrastructure, and analog design is at the heart of it. As a Principal Analog Mixed Signal Design Engineer, you will architect and design the high-performance analog and mixed-signal circuits that anchor our…
Senior Packaging Integration Lead
6 weeks agoAstera Labs · San Jose, California, United States
Lead / staffEngineeringWe are seeking a Senior Packaging Integration Lead to serve as the single-threaded packaging owner for one or more of Astera Labs’ advanced connectivity products. This role owns the end-to-end packaging solution from customer requirements and package architecture definition…
Principal Product Applications Engineer
6 weeks agoAstera Labs · Shanghai Shi, China
Lead / staffEngineeringAstera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent…
Design Verification Tech Lead- SerDes/PHY IP
6 weeks agoAstera Labs · San Jose, California, United States
Lead / staff$160K – $200K a yearEngineeringAstera Labs is hiring a Principal Design Verification Engineer to own functional verification of our high-speed SerDes/PHY IP — the connectivity engine powering rack-scale AI infrastructure. You will architect verification environments, drive coverage closure, and ensure…
DFT Engineer
6 weeks agoAstera Labs · Bengaluru, Karnataka, India
Senior$133.2K – $185K a yearEngineeringRTL Design & Implementation; Own RTL design for assigned blocks from microarchitecture through synthesis sign-off; Develop high-quality, synthesizable Verilog/SystemVerilog with strong attention to PPA; Drive design reviews, lint, CDC, and timing closure activities to…
Astera Labs · Ho Chi Minh City, Vietnam
Lead / staffEngineeringWe are seeking an experienced Analog/Mixed-Signal (AMS) Circuit Design Engineer to join our high-performance design team working on next-generation transceiver IPs targeting the FinFET technology node.
Astera Labs · Bengaluru, Karnataka, India
Lead / staffEngineeringWe are looking for a Principal Logic Design Engineer with strong expertise in high-performance interconnect and SoC/IP design to lead RTL and microarchitecture development for UALink-based IP/subsystems.
Lead Logic Design Engineer
7 weeks agoAstera Labs · Bengaluru, Karnataka, India
Lead / staffEngineeringWe are seeking a Lead Logic Design Engineer with deep expertise in micro-architecture and RTL design to lead the development of complex IPs/subsystems. The candidate will provide technical ownership across architecture, microarchitecture, RTL implementation, integration, and…
Senior System Validation Engineer
7 weeks agoAstera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel
SeniorEngineeringDevelop and execute post-silicon functional and system validation from silicon bring-up through production readiness.; Run PVT, silicon corner, stress, characterization, and qualification testing across a wide range of operating conditions.; Develop validation tests to verify…
Updated 07 Nov 2026 10:21 UTC from the OptiTalent job library.