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Jobs at Astera Labs
157 open roles read nightly from companies’ own hiring pages. Each one links to the original ad.
1–20 of 157 jobs
Principal PCS/PMA RTL Design Engineer
3 days agoAstera Labs · San Jose, California, United States
Lead / staff$185K – $240K a yearEngineeringDevelop synthesizable Verilog/SystemVerilog RTL for PCS and PMA digital blocks supporting Ethernet, PCIe, UCIe, UALink, and related protocols.; Implement PCS functions such as line encoding/decoding (64b/66b, 128b/130b, 8b/10b), scrambling/descrambling, block and word…
Lead Verification Engineer
3 days agoAstera Labs · San Jose, California, United States
Lead / staff$160K – $200K a yearEngineeringDevelop and execute test plans for firmware verification using white-box testing methodologies at the component level (e.g., PCIe, UART, SPI).; Review code, identify bugs, and thoroughly test various firmware levels, including PHY, PCIe, and security features.; Collaborate with…
Astera Labs · San Jose, California, United States
Lead / staff$190K – $240K a yearOperationsAstera Labs is seeking a Sourcing Manager to support sourcing and procurement activities across capital equipment, IT hardware, and corporate services.
Principal AI Product Manager
4 days agoAstera Labs · San Jose, California, United States
Lead / staff$185K – $240K a yearProductAstera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent…
Technical Lead Digital Design Engineer
4 days agoAstera Labs · San Jose, California, United States
Lead / staff$160K – $200K a yearEngineeringJoin our team as Technical Lead Digital Design Engineer to contribute to the design and implementation of next-generation digital designs for high-performance connectivity solutions. You'll work on complex blocks from micro-architecture through silicon bring-up, collaborating…
Astera Labs · Haifa District, Israel
Lead / staffEngineeringAstera Labs is establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a highly skilled Chip Top…
Astera Labs · San Jose, California, United States
Senior$135K – $170K a yearData & AIManufacturing and Test Data Platforms:
Astera Labs · San Jose, California, United States
Lead / staff$207K – $230K a yearEngineeringAstera Labs is hiring a Principal Design Verification Engineer to own functional verification of our high-speed SerDes/PHY IP — the connectivity engine powering rack-scale AI infrastructure. You will architect verification environments, drive coverage closure, and ensure…
Synthesis & STA Engineer – High-Speed SerDes
10 days agoAstera Labs · San Jose, California, United States
$160K – $200K a yearEngineeringAs an Astera Labs Synthesis & STA Engineer – High-Speed SerDes you will play a crucial role in driving the planning, coordination, and execution supporting the design of Astera Labs' portfolio of high-speed analog/mixed-signal SerDes and connectivity ASICs used in the world's…
Physical Design Team Lead
12 days agoAstera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel
Lead / staffDesignAstera Labs is a hyper-growth connectivity company building the purpose-built silicon that powers rack-scale AI infrastructure. As a Principal Physical Design Engineer and Team Lead in Israel, you will lead physical design teams that take complex, high-speed mixed-signal and…
Physical Design Engineering Director
2 weeks agoAstera Labs · Toronto, Ontario, Canada
On-siteDirectorCA$200K – CA$250K a yearEngineeringAstera Labs is seeking a Physical Design Engineering Director to lead a team of physical design engineers at our Toronto site, driving the implementation of connectivity ASICs within our Signal Connectivity Group. This group is responsible for products that enable high-speed…
Principal EPM
2 weeks agoAstera Labs · San Jose, California, United States
Lead / staff$160K – $200K a yearAs a Principal Engineering Program Manager on our Analog/Mixed-Signal (AMS) team, you will drive the execution of the complex silicon programs that power Astera Labs' purpose-built connectivity solutions. You'll orchestrate multi-disciplinary teams — spanning circuit design,…
Principal Post-Silicon Validation Engineer
2 weeks agoAstera Labs · San Jose, California, United States
Lead / staff$207K – $230K a yearEngineeringAstera Labs is looking for a Principal Post-Silicon Validation Engineer to take our connectivity silicon from first-silicon bring-up to production-ready. You will own the validation strategy for high-speed interconnect products, characterize real silicon in the lab, and drive…
Firmware Engineer
2 weeks agoAstera Labs · San Jose, California, United States
SeniorEngineeringThe mission of this role is to architect and develop firmware and microcontroller subsystems for Astera Labs’ SoC and systems products. Firmware is responsible for implementing the major differentiating features of Astera Labs’ products. As such, firmware is considered equally…
Astera Labs · San Jose, California, United States
Lead / staff$185K – $240K a yearEngineeringWe are seeking a Principal Electrical Design Engineer to define and drive the architecture, design, and technical strategy for advanced board-level hardware across next-generation networking and high-performance connectivity platforms. This role encompasses complex hardware…
Director ASIC Technical Program Management
3 weeks agoAstera Labs · San Jose, California, United States
Director$210K – $275K a yearOperationsWe are looking for a Director ASIC Technical Program Management to join the PMO organization at Astera Labs, based in the USA.
Principal Digital Design Engineer
3 weeks agoAstera Labs · San Jose, California, United States
Lead / staff$185K – $240K a yearEngineeringWe are looking for Principal Digital Design Engineers with experience developing micro-architecture and implementation of the front-end circuit design, including RTL, synthesis, IP integration, and block-level verification for high performance network controllers. The candidate…
Teach Lead Physical Design Engineer
3 weeks agoAstera Labs · Singapore
Lead / staffEngineeringWe are seeking a Senior Physical Design Engineer to join our high-performance design team working on next-generation transceiver IPs targeting the TSMC 3nm and advanced technology nodes
Principal Physical Design Engineer
3 weeks agoAstera Labs · Singapore
Lead / staffEngineeringWe are seeking a Senior Physical Design Engineer to join our high-performance design team working on next-generation transceiver IPs targeting the TSMC 3nm and advanced technology nodes
Analog Mixed Signal Design Engineer
3 weeks agoAstera Labs · Singapore
EngineeringAs an Analog/Mixed-Signal IC Design Engineer , you will be part of a key team designing sophisticated advanced node CMOS products. Your responsibilities will include developing and verifying circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, and CDRs to meet…
Updated 06 Nov 2026 09:37 UTC from the OptiTalent job library.