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Eliyan

CAD - Staff AMS CAD Engineer

San Francisco, California, United States

Location
San Francisco, California, United States
Work
On-site
Employment
Full-time
Level
Lead / staff
Function
Engineering
Pay
Not stated
Posted
9 months ago

Pay and the market here

5,003 engineering jobs open in San Francisco: 9% remote, 949 posted in the last 30 days.

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About the role

Join the leading chiplet startup! As an Eliyan Staff AMS CAD Engineer, you will be working at a fast-paced startup creating technologies that fuel tomorrow’s chiplet based systems with best-in-class power, area, manufacturability, and design flexibility. You will be implementing, administering, and ensuring accuracy and repeatability of all analog CAD flows. You will work with a cross-functional team of industry experts that operate from first principles, innovate and push the envelope to create high-volume and high-performance manufacturable products. We offer a fun work environment with excellent benefits.

Key Responsibilities

  • PDK Download & Setup – Download, install, and configure Process Design Kits (PDKs) for analog/mixed-signal design environments.
  • IP Download & Setup – Manage the acquisition and integration of third-party and in-house IP blocks into the design environment.
  • Tools & License Management – Administer EDA tools installation, upgrades, and license server management to ensure uninterrupted access for design teams.
  • SOS Management – Handle project setup and workarea setup, including directory structures, access controls, and design environment configuration.
  • Simulation Model Files Setup – Configure and validate simulation model files (SPICE models, statistical models, etc.) for accurate circuit simulation.
  • Slurm Configuration – Set up and maintain Slurm workload manager for efficient job scheduling and compute resource allocation.
  • Setup PV Flows – Establish and maintain Physical Verification flows including FILL, DRC, LVS, PERC, and Antenna checks.
  • Setup RC Extraction – Configure parasitic RC extraction flows for accurate post-layout simulation and analysis.
  • Setup Voltus -Fi EMIR Flow – Implement and maintain Voltus-Fi based Electromigration and IR drop (EMIR) analysis flow.
  • Setup EMX Flow – Configure and deploy EMX electromagnetic simulation flow for passive component and interconnect modeling.
  • Analog Macro Release Procedure – Define and maintain the release procedure for analog macros for digital hand-off, including GDS, LEF, LIB/DB, CDL, and behavioral models, ensuring completeness, quality checks, and seamless integration into the digital design flow.
  • EDA Vendor Coordination – Work closely with EDA vendors (e.g., Cadence, Synopsys, Siemens/Mentor) to evaluate new tools and updates, report bugs, obtain patches, resolve tool-related issues, and drive enhancements aligned with design team requirements.
  • Debug Issues – Troubleshoot and resolve issues associated with AMS tools, flows, and design environment configurations.

Qualifications

  • Education – Master's degree in electrical engineering, Electronics, or a related field.
  • Experience – Minimum of 5 years of relevant experience in AMS CAD/design environment support.
  • EDA Tools Proficiency – Hands-on experience with industry-standard EDA tools such as Cadence Virtuoso Layout/Schematic, ADE Assembler, Pegasus, Quantus, Calibre, and related tools.
  • Programming Skills – Strong programming and scripting abilities in Python, Cadence SKILL, Cadence PCELLS, and Shell scripting (Bash/Tcsh) for automation and flow development.

Source

Posted by Eliyan on their own hiring page, jobs.lever.co. OptiTalent shows it as published, read 07 Nov 2026 11:34 UTC; the original is the reference.

View the original ad ↗

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