Skip to main content

Eliyan

Program Management - Principal / Sr. Principal Technical Program Manager – IP, ASIC & Chiplet Platforms

San Francisco, California, United States

Location
San Francisco, California, United States
Work
On-site
Employment
Full-time
Level
Lead / staff
Function
Operations
Pay
Not stated
Posted
3 months ago

Pay and the market here

908 operations jobs open in San Francisco: 8% remote, 271 posted in the last 30 days.

Wondering how well you fit this one? OptiTalent Career checks each requirement against your own record, privately. About OptiTalent Career →

About the role

Eliyan is building the interconnect technology that makes chiplet-based systems possible. Our NuLink™ die-to-die PHY IP and NuGear™ chiplet solutions — offered both as licensable IP and as fully integrated chiplet products — deliver up to 4x the bandwidth and half the power of alternative approaches, letting the industry’s leading AI, HPC, and networking silicon teams mix best-in-class dies into a single high-performance package using both open standards (UCIe) and our own proprietary interconnect. As an Eliyan Principal / Sr. Principal Technical Program Manager, you’ll own the end-to-end execution of our IP, ASIC, and platform programs — from architecture and IP definition through design, verification, silicon bring-up, and production readiness. You’ll work shoulder-to-shoulder with a deep bench of design, packaging, and software experts who operate from first principles and push the envelope to create high-volume, high-performance, manufacturable products. This is a high-visibility, high-ownership role at a fast-moving, early-stage company defining a new category of semiconductor technology.

ON-SITE (BAY AREA)

Key Responsibilities

  • Program Leadership: Own end-to-end execution of IP, ASIC, and platform programs, from architecture and IP definition through design, verification, validation, silicon bring-up, and production readiness.
  • Plan of Record & Critical Path Management: Build and maintain an integrated program schedule spanning design, verification, DFT, physical design, packaging, and software; own the critical path and drive it to closure.
  • Cross-Functional Coordination: Partner daily with digital design, design verification, DFT, physical design, analog/mixed-signal design, packaging and substrate design, PCB and platform design, silicon bring-up, firmware, and software teams to keep every workstream aligned.
  • Technical Fluency: Get into the technical details of interconnect and chiplet architecture, packaging tradeoffs, and SoC-level integration — enough to ask sharp questions, unblock engineering decisions, and speak credibly with customers and partners.
  • Vendor and IP Management: Manage external IP vendors and OSAT/packaging partners, holding them accountable to committed timelines, specifications, and quality.
  • Customer Engagement: Serve as the primary program interface to customers, defining deliverables and ensuring seamless integration of Eliyan’s IP and silicon solutions into their products.
  • Schedule and Risk Management: Define milestones, maintain a live risk register, and proactively identify and mitigate the risks most likely to move the critical path.
  • Budget and Resource Allocation: Manage program budgets, allocate resources efficiently, and track spend against plan to optimize development efforts.
  • Technical Reviews and Decision-Making: Run regular program and technical reviews, surface tradeoffs, and drive decisions that optimize performance, cost, and schedule.
  • Executive Reporting and Metrics: Quantify program health with clear KPIs, and translate technical detail into concise, decision-ready updates for engineering leadership and executives.
  • Process, Documentation, and Reporting: Define and continuously improve program management practices and tooling as Eliyan scales, maintain clear documentation, and keep stakeholders informed with regular updates.

Required Qualifications

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
  • 15+ years of semiconductor program management experience, including pre-silicon and post-silicon execution across at least two full IP or ASIC programs, from concept through production.
  • Proven ability to lead large-scale, complex, multi-disciplinary semiconductor programs from architecture through volume production.
  • Demonstrated ability to juggle multiple concurrent programs at once, making portfolio-level trade-offs — prioritizing resources, schedules, and scope across programs to maximize overall business impact.
  • Deep working knowledge of the full silicon development lifecycle — front-end and back-end design, DV, DFT, packaging, PCB/platform design, and silicon bring-up.
  • Experience managing external IP vendors and direct customer engagements around technical deliverables and integration.
  • Strong track record driving schedule, risk, and budget management across many concurrent, interdependent workstreams.
  • Excellent verbal and written communication skills, with the ability to tailor style, tone, and level of detail to any audience — from a deep technical exchange with individual engineers to a concise, decision-ready narrative for the CEO.
  • Ability to influence and drive alignment across engineering teams without direct authority, in a fast-moving startup environment.
  • Experience with program management tools (e.g., Jira, MS Project, Smartsheet, Confluence) and methodologies (Agile, Waterfall, or hybrid).

Preferred Qualifications

  • Direct experience with chiplet interconnect, UCIe, or die-to-die PHY programs, or with advanced packaging (2.5D/3D, CoWoS, InFO, or similar).
  • Background in networking ASICs, mixed-signal PHY SoCs, high-performance computing, or AI/ML accelerator silicon.
  • Working knowledge of firmware and software bring-up as it relates to silicon validation.
  • PMP, PgMP, or equivalent program management certification.

What We Offer

  • The chance to shape the program management function at a company defining a new segment of the semiconductor industry.
  • Direct, high-visibility partnership with Eliyan’s founding and technical leadership team.
  • Competitive salary, meaningful equity, and comprehensive health benefits.
  • A collaborative, first-principles engineering culture built around solving hard problems together.

Source

Posted by Eliyan on their own hiring page, jobs.lever.co. OptiTalent shows it as published, read 07 Nov 2026 11:34 UTC; the original is the reference.

View the original ad ↗

More at Eliyan

  • Eliyan · San Francisco, California, United States

    On-siteFull-timeMid levelEngineering

    As a Silicon Validation Engineer, you will be a technical owner to drive early silicon bring-up, post-silicon validation strategy, and hands-on execution for high-speed interconnects such as multi-Gbps SerDes and PHYs. You will work closely with design, architecture, and…

  • Eliyan · San Francisco, California, United States +2

    On-siteFull-timeLead / staffEngineering

    Develop and execute RNM AMS model for best in class PHYs.; Make sure the quality of models reflects schemetics.; Write and debug SystemVerilog/UVM compliant test cases; Collaborate with design team to ensure design quality; Expertise to understand analog blocks.

  • Eliyan · San Francisco, California, United States +2

    On-siteFull-timeSeniorEngineering

    Eliyan is the chiplet interconnect pioneer behind NuLink, the industry's most efficient chiplet-to-chiplet PHY technology. With Series C funding from leading hyperscalers and AI infrastructure providers, we are scaling our digital design organization to support multiple…

  • Eliyan · San Francisco, California, United States

    On-siteFull-timeLead / staffEngineering

    As a Sr Staff / Principal Physical Verification Engineer, you will be the technical owner of all signoff physical verification activities across advanced process nodes. You will lead DRC, LVS, and DFM sign-off at chip top level, drive hierarchical verification strategies, and…