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Astera Labs

Lead Verification Engineer

San Jose, California, United States

Location
San Jose, California, United States
Work
Not stated
Employment
Not stated
Level
Lead / staff
Function
Engineering
Pay
$160K – $200K a year (read from the ad)
Posted
3 days ago

About the role

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

As a Technical Lead on Verification at Astera Labs, you will be responsible for verifying the firmware and microcontroller subsystems for Astera Labs’ SoC and system products. In this role, you will play a key part in ensuring the quality and reliability of firmware by using both white-box and black-box testing methodologies. You will work closely with the firmware development team to build and execute test cases for specific components, identify bugs, and verify the overall implementation. This role will focus on validating firmware for high-speed interfaces in data center, server, and networking applications.

Key Responsibilities

  • Develop and execute test plans for firmware verification using white-box testing methodologies at the component level (e.g., PCIe, UART, SPI).
  • Review code, identify bugs, and thoroughly test various firmware levels, including PHY, PCIe, and security features.
  • Collaborate with the development team to ensure proper verification of hardware-software (HW-SW) interfaces on complex SoCs.
  • Create automated test scripts using Python and manage test environments to ensure efficiency and accuracy in testing.
  • Work with system-level validation and QA teams to ensure comprehensive testing of the entire product lifecycle.

Basic Qualifications

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or Computer Science (Master's preferred).
  • +10 years of experience in firmware verification or development for SoC/silicon products.
  • Proficiency in C and Python programming with experience in developing component-level test cases for firmware verification.
  • Strong understanding of white-box testing methodologies, with experience in testing lower-level firmware components.
  • Hands-on experience with server, storage, and/or networking equipment (e.g., PCIe/Ethernet Switches).
  • Familiarity with high-speed interfaces and IP blocks such as PCIe Controllers, DDR Controllers, NVMe, AMBA/AHB interfaces, and on-chip memory.
  • Experience working in software/firmware build environments (gcc/Make, GitHub) and test automation tools like Python.

Preferred Qualifications

  • Experience developing or testing embedded firmware for high-speed interface products (e.g., PCIe, Ethernet).
  • Familiarity with industry standards such as NIST, Open Compute Project, and DMTF.
  • Knowledge of secure software, including cryptography, authentication, and common software vulnerabilities.

Salary range is $160,000 to $200,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Source

Posted by Astera Labs on their own hiring page, job-boards.greenhouse.io. OptiTalent shows it as published, read 07 Nov 2026 00:27 UTC; the original is the reference.

View the original ad ↗

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