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Jobs in San Francisco, United States

10 open roles read nightly from companies’ own hiring pages. Each one links to the original ad.

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  • Digital Verification Engineer

    2 weeks ago

    Efficient Computer · San Francisco, Texas, United States

    Mid level$130K – $180K a yearEngineering

    Develop and maintain UVM/SystemVerilog testbenches, sequences, and tests for block- and subsystem-level verification.; Write verification plans from design specifications in collaboration with design and architecture teams.; Write SystemVerilog assertions and functional…

  • Senior Digital Verification Engineer - Contract

    3 weeks ago

    Efficient Computer · San Francisco, Texas, United States

    ContractSenior$80.00 – $130.00 an hourEngineering

    Efficient Computer is rethinking computing from the ground up to solve one of AI's biggest challenges: energy. Our Fabric architecture delivers a 10–100x improvement in energy efficiency for general-purpose computation, including AI, while supporting familiar programming…

  • Senior RTL Design Engineer

    3 weeks ago

    Efficient Computer · San Francisco, Texas, United States

    Senior$180K – $245K a yearEngineering

    Implement microarchitecture and RTL for assigned blocks in the compute fabric, on-chip networks/NoC, memory interfaces, and peripheral subsystems, working from architecture and uArch specifications.; Integrate third-party and in-house IP (RISC-V cores, NVM controllers, SRAM…

  • Staff Digital Verification Engineer

    2 months ago

    Efficient Computer · San Francisco, Texas, United States

    Lead / staff$160K – $245K a yearEngineering

    Efficient Computer is rethinking computing from the ground up to solve one of AI's biggest challenges: energy. Our Fabric architecture delivers a 10–100x improvement in energy efficiency for general-purpose computation, including AI, while supporting familiar programming…

  • Hardware Technical Program Manager

    2 months ago

    Efficient Computer · San Francisco, Texas, United States

    Senior$200K – $260K a yearOperations

    Own the silicon schedule from architecture freeze through tapeout, bring-up, and production with the schedule informed by customer requirements and internal functional leads.; Drive the weekly execution cadence (program reviews, design reviews, tapeout readiness) and maintain a…

  • Sr Staff Physical Design - SOC Top Lead

    3 months ago

    Efficient Computer · San Francisco, Texas, United States

    Lead / staff$180K – $260K a yearDesign

    Full-chip integration: floorplanning, power planning, macro/hard-IP placement, and block partitioning at the top level, ensuring convergence across all hierarchical blocks; Timing closure: full-chip STA across all corners/modes (setup, hold, OCV, multi-mode multi-corner),…

  • Senior Product Manager - Software

    5 months ago

    Efficient Computer · San Francisco, Texas, United States

    Senior$160K – $240K a yearEngineering

    Define the product roadmap for the compiler, SDK, runtime, model conversion and enablement tooling, and developer platform. Set priorities based on customer requirements, competitive positioning, and strategic platform needs.; Lead framework and model enablement strategy across…

  • Lead RTL Design Engineer

    6 months ago

    Efficient Computer · San Francisco, Texas, United States

    Lead / staff$200K – $275K a yearEngineering

    Microarchitecture definition (core focus): Own the design and definition of processor and compute-unit microarchitecture, including dataflow pipelines, execution units, and interfaces. Set performance, power, and area targets, and guide the team toward achieving them.; On-chip…

  • Physical Design - CAD Lead

    8 months ago

    Efficient Computer · San Francisco, Texas, United States

    Lead / staff$180K – $260K a yearDesign

    Drive and develop PD flows, methodology for state of the art finfet and multi patterning based technologies from scratch in Cadence Tempus or Synopsys Primetime.; Help develop repeatable, predictable , design and process agnostic PD flows.; Develop state of the art flow…

  • Lead Digital Verification Engineer

    8 months ago

    Efficient Computer · San Francisco, Texas, United States

    Lead / staff$200K – $260K a yearEngineering

    Define the end-to-end verification strategy across block, subsystem, and full-chip levels aligned with tapeout milestones; Author and review verification plans mapping specifications to features, stimulus strategies(traditional stimulus generation, compiler driven), coverage…

Updated 07 Nov 2026 10:21 UTC from the OptiTalent job library.