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Volantis Semiconductor, Inc.

Wafer Architect

San Francisco, California, United States +2

Apply on Volantis Semiconductor, Inc.’s site ↗View original ad
Location
San Francisco, California, United States · Austin, Texas, United States · Boston, Massachusetts, United States
Work
Hybrid
Employment
Not stated
Level
Lead / staff
Function
Other
Pay
Not stated
Posted
3 months ago

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About the role

What We’re Looking For

We’re looking for an architect to own the logical architecture for the A-0 and A-1 wafer products. You will work with the XPU/Compute chip architect and the memory architect to synthesize the final wafer-level architecture.

Ideal Background

An ideal candidate will have:

  • Deep understanding and hands-on experience in the design process of AI chips, such as GPUs, TPUs, XPUs, custom ASICs, etc
  • Understanding of memory sub-systems and interactions in multi-die systems
  • Understanding of LLM inference workloads, especially at a software level and its implications for hardware (system, package, network, die-level) systems

Strongly Preferred

  • Experience with multi-die designs
  • Experience with MCM and chiplet based architectures and architectural partitioning across them
  • Experience in partitioning workloads across multiple chips and chip packages

Source

Posted by Volantis Semiconductor, Inc. on their own hiring page, job-boards.greenhouse.io. OptiTalent shows it as published, read 07 Nov 2026 11:26 UTC; the original is the reference.

View the original ad ↗

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