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Volantis Semiconductor, Inc.

ASIC Design Engineer

San Francisco, California, United States +2

Location
San Francisco, California, United States · Austin, Texas, United States · Boston, Massachusetts, United States
Work
Hybrid
Employment
Not stated
Level
Not stated
Function
Engineering
Pay
Not stated
Posted
3 months ago

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About the role

What We’re Looking For

We’re looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer.

Ideal Background

An ideal candidate will have:

  • Hands-on experience with multiple advanced node tapeouts
  • Ownership of ASIC design portion of at least one block in multiple advanced node tapeouts
  • Understanding of PPA improvement and what levers exist for each level of the stack
  • Ability to think creatively about methodology for fast design iterations

Nice to Have

  • Hands-on experience with ASIC design process for large die (ideally reticle max) chips
  • Hands-on experience with ASIC design process for AI chips
  • Hands-on experience with multi-die/multi-chiplet/MCM designs

Source

Posted by Volantis Semiconductor, Inc. on their own hiring page, job-boards.greenhouse.io. OptiTalent shows it as published, read 07 Nov 2026 11:26 UTC; the original is the reference.

View the original ad ↗

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